An Introduction To Logic Gates Essay

An conception To Logic adits EssayLogic term of enlistment is star that behaves same(p) a switch, i.e. a dickens-positive muse with ON or OFF narrates. This is termed as double star device, in which the ON state is represented by 1 and the OFF state by 0.We require devising a system of logic statement which target be expressed in only peerless of twain forms. For instanceAs you may have a go at it, computers descent information in gigabytes, megabytes, and so on. The fundamental unit of storage is the bit or binary digit, which is similar to a switch. Like a switch, which has two states on or murder, the bit has two states 1 and 0 (some beats represented as true and false. We use this abstraction to represent numbers with the binary number system.In order to perform calculations, the computer manipulates bits by means of logical trading operations, which use inserts to yield a limited getup based on the input bits states. To explicitly define the logic, we u se right tables which express the takingss in terms of all combinations of inputs.Examples of truth tables for logical operations argon given below lucid AND (i.e. A.B=C)Logical OR (i.e. A+B=C)Logical non (i.e. A)A useful way of representing these logical operations is by means of logic entrys, which be pictorial representations of the logic. The most basic logic render, which illustrate the Boolean logic of the above truth tables, arAND logic adit C=A.BOR logic inlet C=A+B non logic gate B=AUsing the logic supply above, we evoke create schematics of more(prenominal) complicated turns. These combinational logic circuits involve feeding the output of one gate to the input of another gate. This abandons us to create useful circuits that function according to our needs. Examples ar provided belowF=X.Y.ZF=X+Y+ZF=X+Y.ZWe probably know that calculators and computers store decimal (0-9) numbers as long strings of zeros and ones in a form called binary code. Each number i s stored using microscopic electronic switches called transistors. Its easy to store binary numbers only when by switching transistors on and off. Switching on a transistor stores a number one switching it off stores a zero. So storing numbers is easy. But how tush you add, subtract, multiply, and divide using vigor but galvanising menstruums? Calculators and computers do these using clever electronic circuits called logic render.Fig1.1Photo A gate can keep we out or allow we into a field. In the same way, a microscopic logic gate is a barrier in an electronic circuit that can let electricity through or stop it flowing al together. Put lots of logic gates together and you make a machine thats capable of basic mathematical reasoning.TYPES OF LOGIC GATESLogic gates circuits that compareA logic gate might sound horribly complex, but its manifestly an electric circuit with two inputs and an output. It receives two incoming electric currents, compares them, and sends on a new, ou tgoing electric current depending on what it finds. A logic gate is a bit like a doorman or bouncer who is allowed to let people into a nightclub only if they pass certain tests. There are quite a few opposite types of logic gate, the most common of which are called AND, OR, NOT, XOR (Exclusive Or), NAND (NOT AND), and NOR (NOT OR). Lets look at the three transparentr ones, AND, OR, and NOTANDSuppose we went to a nightclub where the doormans job is to enforce a simple overlook Everyone in our group must wear a tie to come in. We went along with a protagonist one night. If were both wearing ties, youll get in. If only one of we is wearing a tie, or if uncomplete of us is, neither of you bequeath get in. An AND logic gate works the same way with two electrical inputs. If both inputs are switched on (that is, carry a number 1), the output will be 1 as well. Otherwise the output will be 0. In electronics, we can represent an AND gate with this little symbol. Three ways in which th e gate can work are shown below.ORWere not wearing a tie, so you go to another club further down the street. Here, the soul on the door is enforcing a different rule A group of people can come in if either one of them is a member. If either we or our friend is a member, or if you both are members, we can both come in. If neither of we is a member, youre both left out in the cold. An OR logic gate works this way with two electrical inputs. If either input is switched on (that is, carries a number 1), the output will be 1 as well. Otherwise the output will be 0. In electronics, we represent an OR gate with a different symbol. Three ways in which it can work are shown beneathNOTSo far, weve failed to get into either of the clubs. But theres one stretch forth hope you know a friend is having a party a few streets away. The only hustle is, theres a really argumentative and contrary person on the door. He talks to each person in turn as they approach him. If youre nice and polite, he shouts abuse at you and turns you away. But if youre brutal to him, he likes that for some reason and lets you in. In other words, he does exactly the enemy of what youd expect In electronics, theres a logic gate that works in the same, contrary way and its called a NOT gate or invertor. Unlike AND and OR gates, it has only one input and one output. The output is exactly the opposite of the input, so if the input is a 0, the output is a 1 and vice versa. Heres how we represent a NOT in electronics. twain ways it can work are shown beneath.The other three common logic gates are variations on these three. XOR (Exclusive OR) is like an OR, but it switches off if both the inputs are switched on. NAND is just like AND, only the end essence is swapped over (so where AND produces an output of 1, NAND produces an output of 0). NOR is like OR with the end result swapped over in the same way.Calculators can do all the things they need to do using different combinations of logic gates. Its logic gates that control how the display works in a calculator and more logic gates that flesh out the results of calculations. Lets take a closer lookNAND gateThis is a NOT-AND gate which is equal to an AND gate followed by a NOT gate. The outputs of all NAND gates are superior i any of the inputs are low. The symbol is an AND gate with a scurvy circle on the output. The belittled circle represents inversion.NOR gateThis is a NOT-OR gate which is equal to an OR gate followed by a NOT gate. The outputs of all NOR gates are low if any of the inputs are high.The symbol is an OR gate with a small circle on the output. The small circle represents inversion.EXOR gateThe Exclusive-OR gate is a circuit which will give a high outputif either, but not both, of its two inputs are high. An encircled electropositive sign () is employ to show the EOR operation.EXNOR gateThe Exclusive-NOR gate circuit does the opposite to the EOR gate. It will give a low output if either, but not both, of its two inputs are high. The symbol is an EXOR gate with a small circle on the output. The small circle represents inversion.The NAND and NOR gates are called universal functions since with either one the AND and OR functions and NOT can be generated.NoteA function in sum of products form can be implemented using NAND gates by replacing all AND and OR gates by NAND gates.A function in product of sums form can be implemented using NOR gates by replacing all AND and OR gates by NOR gates.IMPLEMENTATION OF LOGIC GATES digit 1.2 130 ELECTRONIC CALCULATORThe Friden 130 uses diode-resistor OR and AND logic gates, with transistor-based inverter, buffer, and jerk- crash devices. It performs math operations in bit-serial form, using the magnetostrictive delay line as the medium for storing its working registers. Logic levels are 0 Volts representing logic 1, and -12 Volts (nominally) representing logic 0. The delay line input transducer is driven with a trice of approximately 20V, and by t he time the designate makes it to the other end of the delay line, the voltage induced in the transducer is approximately 35mV, or 35/1000ths of a volt. Digits are stored within the delay line as a series of pulses arranged in groups for each digit. Zero pulses represent a zero, and guild pulses represent a nine, with the numbers in-between represented by a number of pulses matching the number. As the pulses exit the delay line, they are amplified and fed into the forebodes (the A and/or D counters), which count the number of pulses in the digit to form a unique five-bit identifier that represents the number. The counter registers are not configure as counters in the usual binary sense. They are instead configured as five stage switch-tail shift registers, such that they count in a sequence of fault 1s. For example 0 is represented as 00000 1 as 10000 2 as 11000 3 as 11100 4 as 11110 5 as 11111 with 6 as 01111, and ending with 9 as 00001. With five hurl misfires, each counter can represent the numbers zero through nine as unique combinations of bit patterns.In terms of applying logic gates to real world applications, umpteen gates can be used in flesh1.3CEP-1114Piezo BuzzerFrequency processing. For example, when dealing with piezo audio transducers such as the CEP-1114, an oscillating frequency signal is require to produce a sound pattern from the buzzer. ikon 3 AND gate signal output wave generator such as an oscilloscope or a programmed PIC must be logically processed with a second frequency signal to create a combination of high/low outputs which will turn the Buzzer on and off creating a sound pattern. So if you used a Square-wave signal from a PIC as one input into an AND gate and a second varying frequency as the other input, it is proven imputable to AND gate logic that when both signals are high the buzzer will produce a sound, and any other combination will turn the buzzer off.Furthermore, as you can see from Figure 3 on the left, the output i s only high when both Input A and Input B are high. If Input B was changed or altered, this would alter the output signal sent to the buzzer. Imagine that Input B was stretched so that only one period was observed in the time give rather than two periods.This would extent the time that Input B is high and would increase the time that the output is high.Additionally, if variation of the wave form inputs is difficult or impossible, variation of the output can still be accomplished by simply changing the logic gate implemented. If the AND gate currently being used was replaced with a NAND gate, the output would be completely reversed. Every time the output was high using the AND gate will now be low, and every time the output was low will now be high.ConclusionLogic gates come in all shapes and sizes, and whether they are used in combinations or individually, they provide the user with many a(prenominal) options and solutions to problems which may seem difficult at first. Furthermor e, these seven basic logic gates ease the complexness of Boolean algebra and allow for simple application in electronics and circuit analysis. These gates can be used in near any situation such as comparison of frequencies when developing filters in intercourse or in more mechanical settings when using choppers and inverters which compare input and output currents to determine modulating indexes.Figure 2 CEP-1114Piezo Buzzer bodacious FLOPS cut into flops are actually an application of logic gates. With the help of Boolean logic you can create reposition with them. This is the most basic idea of a Random gate Memory RAM. If the logic gates are designed correctly, they will be helpful in memory the input order given to them. A higher application of flip flops is helpful in shrewd better electronic circuits.The main use of flip flops is the implementation of a feedback circuit. As a memory relies on the feedback concept, flip flops can be used to design it. Given below is a simp le feedback circuit using two inverter logic gates. Take a look.Though this circuit is not unafraid for practical electronic circuits, it will help you to get a clear idea on what a feedback circuit is. When the value of the output Q happens to be 0, it always remains 0. If the output happens to be 1, it always remains 1There are mainly four types of flip flops that are used in electronic circuits. They areThe basic flip flop or S-R thresh hissDelay summersault hissing D Flip FlopJ-K flip flopT flip flop1. S-R Flip FlopThe SET- determine flip flop can be designed with the help of two NOR gates and also two NAND gates. These flip flops are also referred to as S-R Latch.S-R Flip Flop using NOR GateThe flip flop has mainly two inputs, called the SET S and RESET R. There are also two outputs, Q and Q. The diagram and truth table is shown below.S-R Flip Flop using NOR GateFrom the diagram it is evident that the flip flop has mainly four states. They areS=1, R=0-Q=1, Q=0This state i s also called the SET state.S=0, R=1-Q=0, Q=1This state is known as the RESET state.In both the states you can see that the outputs are just heed of each other and that the value of Q follows the value of S.S=0, R=0-Q Q = RememberIf both the values of S and R are switched to 0, then the circuit remembers the value of S and R in their previous state.S=1, R=1-Q=0, Q=0 InvalidThis is an invalid state because the values of both Q and Q are 0. They are supposed to be heed of each other. Normally, this state must be avoided.S-R Flip Flop using NAND GateThe circuit of the S-R flip flop using NAND Gate and its truth table is shown below.S-R Flip Flop using NAND GateLike the NOR Gate S-R flip flop, this one also has four states. They areS=1, R=0-Q=0, Q=1This state is also called the SET state.S=0, R=1-Q=1, Q=0This state is known as the RESET state.In both the states you can see that the outputs are just compliments of each other and that the value of Q follows the compliment value of S.S= 0, R=0-Q=1, Q =1 InvalidIf both the values of S and R are switched to 0 it is an invalid state because the values of both Q and Q are 1. They are supposed to be compliments of each other. Normally, this state must be avoided.S=1, R=1-Q Q= RememberIf both the values of S and R are switched to 1, then the circuit remembers the value of S and R in their previous state.Clocked S-R Flip FlopIt is also called a Gated S-R flip flop.The invalid state can only be remove by using a bistable SR flip-flop that can change outputs when certain invalid states are met regardless of the condition of either the Set or the Reset inputs. For this, a clocked S-R flip flop is designed by adding two AND gates to a basic NOR Gate flip flop. The circuit diagram and truth table is shown below.Clocked S-R Flip FlopA clock pulse CP is given to the inputs of the AND Gate. In the beginning the outputs of both the AND Gates remain 0 until the value of CP is 0. When a pulse is given the value of CP turns 1. Thi s makes the values at S and R to pass through the NOR Gate flip flop. But when both the S and R values turn 1, the senior high value of CP causes both of them to turn to 0 for a short moment. As soon as the pulse is removed, the flip flop state becomes intermediate. Thus either of the two states may be caused, and it depends on whether the set or reset input of the flip-flop remains a 1 longer than the transition to 0 at the end of the pulse. Thus the invalid states can be eliminated.2. D Flip FlopThe circuit diagram and truth table is given below.D Flip FlopD flip flop is actually a slight modification of the above explained clocked SR flip-flop. From the figure you can see that the D input is connected to the S input and the complement of the D input is connected to the R input. The D input is passed on to the flip flop when the value of CP is 1. When CP is HIGH, the flip flop moves to the SET state. If it is 0, the flip flop switches to the CLEAR state.To know more about the tri ggering of flip flop hot dog on the link below.TAKE A LOOK TRIGGERING OF FLIP FLOPSTAKE A LOOK MASTER-SLAVE FLIP FLOP CIRCUIT3. J-K Flip FlopThe circuit diagram and truth-table of a J-K flip flop is shown below.J-K Flip FlopA J-K flip flop can also be defined as a modification of the S-R flip flop such that it is a refinement at the indeterminate state of the SR flip flop.The inputs J and K behave just like the S and R inputs of the S-R flip flop. The garner J stands for SET and the letter K stands for CLEAR.When both the inputs J and K have a HIGH state, the flip-flop is designed to switch to its complement state. So if the value of Q was 1, it switches to Q=0 and if the value of Q was 0 it switches to Q=1.Two 3-input AND Gates are used in the circuit. The output Q of the flip flop is given as a feedback to the input of the AND along with other inputs like K and clock pulse CP. So, the flip flop gets a CLEAR signal when the value of CP is 1 only if the value of Q was earlier 1. S imilarly output Q of the flip flop is given as a feedback to the input of the AND along with other inputs like J and clock pulse CP. So the output becomes SET when the value of CP is 1 only if the value of Q was earlier 1.The output may be repeated in transitions once they have been complimented for J=K=1 because of the feedback fellowship in the JK flip-flop. This can be avoided by setting a time duration lesser than the file name extension delay through the flip-flop. The restriction on the pulse width can be eliminated with a master-slave or edge-triggered construction.4. T Flip FlopThis is a much simpler version of the J-K flip flop. Both the J and K inputs are connected together and thus are also called a single input J-K flip flop. When clock pulse is given to the flip flop, the output begins to toggle. Here also the restriction on the pulse width can be eliminated with a master-slave or edge-triggered construction. Take a look at the circuit and truth table below.T Flip Flo pConclusionLogic gates come in all shapes and sizes, and whether they are used in combinations or individually, they provide the user with many options and solutions to problems which may appear difficult at first. Furthermore, these seven basic logic gates ease the complexity of Boolean algebra and allow for simple application in electronics and circuit analysis. These gates can be used in almost any situation such as comparison of frequencies when developing filters in communication or in more mechanical settings when using choppers and inverters which compare input and output currents to determine modulating indexes